On Wed, 10 Oct 2018 01:47:10 +0000 "Wuzongyong (Euler Dept)" <cordius.wu@xxxxxxxxxx> wrote: > > You're right. The initial states are not identical. > I found the function vfio_pci_pre_reset in qemu. > /* > * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master. > * Also put INTx Disable in known state. > */ > cmd = vfio_pci_read_config(pdev, PCI_COMMAND, 2); > cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | > PCI_COMMAND_INTX_DISABLE); > vfio_pci_write_config(pdev, PCI_COMMAND, cmd, 2); > > So the behaviors between the two reset are inconsistent. > > Then I wonder whether the operation is necessary here? > Could I enable the Memory bit in the Command register in vfio_pci_post_reset, > because I want to write regions of PCI devices after reset. One reset is done by the kernel to try to put the device into a known clean state before allowing the user access to it, the other is done by QEMU as part of the initial machine reset. I suppose we could special case the initial machine reset, but it seems perhaps risky and unnecessary. QEMU is the driver here, it can certainly enable MMIO on the device and there are some examples in the QEMU code where MMIO is enabled to interact with the device, see vfio_radeon_reset() for example. The device driver in the guest or the VM firmware should be the one to enable the device for VM usage though, QEMU should provide the device to the VM in a power-on default state, or as close as we can reasonably get to that. Thanks, Alex -- libvir-list mailing list libvir-list@xxxxxxxxxx https://www.redhat.com/mailman/listinfo/libvir-list
