On 2017年12月13日 21:42, Daniel P. Berrange wrote:
On Wed, Dec 13, 2017 at 08:43:38PM +0800, Feng, Shaohe wrote:
Hi all,
Now both qemu and kvm support 5-level paging.
We can start qemu with a "cpu,+la57" to set 57-bit vitrual address space.
So VM can be aware that it need to enable 5-level paging.
We can also set another "cpu,phys-bits=52" to set the VM physical address
space.
Actually, VM can still turn on 5 level paging even without "phys-bits=52",
yet this means
the guest physical address width are limited, meaning less practical
benefits.
In to support 5-level paging, I suggest to add two attribute for the domain
cpu element in libvirt.
<cpu la57='yes', phys-bits='52'\>
This doesn't make sense - 'la57' is just a CPU feature like any other
CPU feature reported in /proc/cpuinfo. IOW, we should just have
<cpu>
....
<feature name="la57" policy="require"/>
</cpu>
If la57='yes', libvirt will probe the host capability, and will throw error
if hardware does support la57.
I'm not seeing why we need to special case la57 handling, when we can just
use standard CPUID checks we already have
If la57='yes', even phys-bits less than 52, libvirt will also pass it to
qemu though less practical benefits.
I would suggest separating la57 from phys-bits, as they're actually
completely independant features. They merely happen to be commonly
used at the same time.
agree, keep them independant.
And still keep phys-bits as attribute of cpu element?
<cpu phys-bits='52'>
....
<feature name="la57" policy="require"/>
</cpu>
Regards,
Daniel
BR
Shaohe Feng
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