Thanks Andrea. I don't see any error really.
but had seen those pvr values missing for DD1/DD2.0 hardware.
if this is not causing any impact, we can ignore this patch.
On 12/04/2017 04:06 PM, Andrea Bolognani wrote:
On Tue, 2017-11-28 at 15:16 +0530, Seeteena Thoufeek wrote:
DD1.0/DD2.0 PVR value is missing from cpu_map.xml. This patch
provides those details
Signed-off-by: Seeteena Thoufeek <s1seetee@xxxxxxxxxxxxxxxxxx>
---
src/cpu/cpu_map.xml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index e5da7a8..be4e215 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -1729,6 +1729,8 @@
<model name='POWER9'>
<vendor name='IBM'/>
<pvr value='0x004e0000' mask='0xffff0000'/>
+ <pvr value='0x004e0100' mask='0xffff0000'/>
+ <pvr value='0x004e1200' mask='0xffff0000'/>
</model>
<!-- Freescale-based CPU models -->
Values match those used in QEMU[1], so that's good.
However I don't think we need this patch at all, since the first
four bytes are the same for all CPU revisions, and we will ignore
the remaining ones due to mask='0xffff0000'.
Did you encounter any actual failure which can be traced back to
those PVRs not being included in the cpu_map.xml file?
[1] https://github.com/qemu/qemu/blob/master/target/ppc/cpu-models.h#L373-L375
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