Re: Proposal PCI/PCIe device placement on PAPR guests

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On 01/12/2017 07:53 PM, Laine Stump wrote:
On 01/12/2017 11:35 AM, Michael Roth wrote:
Quoting Laine Stump (2017-01-12 08:52:10)

[...]



Yeah you're right, I'm probably remembering the wrong problem and wrong reason for the problem. I just remember there was *some* issue about hotplugging new PCI controllers. Possibly the internal
representation of the bus hierarchy wasn't updated unless you forced a rescan of all the devices or something? My memory of it is vague, I just remember being told it wasn't just a case of the
controller itself being initialized.

Alex or Marcel - since whatever it was I likely heard it from one of you (or imagined it in a dream), can you straighten me out?


Hi Laine,

Indeed, hot-plugging a QEMU pci-bridge in X86 is somehow problematic since
it comes with some bits on ACPI tables which are already loaded at hot-plug time.
We need the bits since the x86 pci-hotplug is ACPI based. For Q35 machine might be easier,
but is not implemented yet as far as I know.

Thanks,
Marcel

[...]

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