This patch computes the .attrConfig value for
cache_l1d correctly and updates the documentation.
The cache_l1d perf event now is renamed as
cache_l1dra perf event for measuring read accesses
for level 1 data cache
Signed-off-by: Nitesh Konkar <nitkon12@xxxxxxxxxxxxxxxxxx>
---
docs/formatdomain.html.in | 12 ++++++------
docs/news.xml | 5 +++--
docs/schemas/domaincommon.rng | 2 +-
include/libvirt/libvirt-domain.h | 12 ++++++------
src/libvirt-domain.c | 5 +++--
src/qemu/qemu_driver.c | 2 +-
src/util/virperf.c | 8 +++++---
src/util/virperf.h | 2 +-
tests/genericxml2xmlindata/generic-perf.xml | 2 +-
tools/virsh.pod | 6 +++---
10 files changed, 30 insertions(+), 26 deletions(-)
diff --git a/docs/formatdomain.html.in b/docs/formatdomain.html.in
index 30cb196..a8ee2db 100644
--- a/docs/formatdomain.html.in
+++ b/docs/formatdomain.html.in
@@ -1937,7 +1937,7 @@
<event name='stalled_cycles_frontend' enabled='no'/>
<event name='stalled_cycles_backend' enabled='no'/>
<event name='ref_cpu_cycles' enabled='no'/>
- <event name='cache_l1d' enabled='no'/>
+ <event name='cache_l1dra' enabled='no'/>
</perf>
...
</pre>
@@ -2013,14 +2013,14 @@
<tr>
<td><code>ref_cpu_cycles</code></td>
<td>the count of total cpu cycles not affected by CPU frequency scaling
- by applications running on the platform</td>
+ by applications running on the platform</td>
<td><code>perf.ref_cpu_cycles</code></td>
</tr>
<tr>
- <td><code>cache_l1d</code></td>
- <td>the count of total level 1 data cache by applications running on
- the platform</td>
- <td><code>perf.cache_l1d</code></td>
+ <td><code>cache_l1dra</code></td>
+ <td>the count of total read accesses for level 1 data cache by
+ applications running on the platform</td>
+ <td><code>perf.cache_l1dra</code></td>
</tr>
</table>
diff --git a/docs/news.xml b/docs/news.xml
index baafcff..93ab40c 100644
--- a/docs/news.xml
+++ b/docs/news.xml
@@ -82,8 +82,9 @@
<description>
Add support to get the count of branch instructions
executed, branch misses, bus cycles, stalled frontend
- cpu cycles, stalled backend cpu cycles, and ref cpu
- cycles by applications running on the platform.
+ cpu cycles, stalled backend cpu cycles, ref cpu
+ cycles and cache l1dra by applications running on the
+ platform.
</description>
</change>
<change>
diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng
index be0a609..a65ad13 100644
--- a/docs/schemas/domaincommon.rng
+++ b/docs/schemas/domaincommon.rng
@@ -433,7 +433,7 @@
<value>stalled_cycles_frontend</value>
<value>stalled_cycles_backend</value>
<value>ref_cpu_cycles</value>
- <value>cache_l1d</value>
+ <value>cache_l1dra</value>
</choice>
</attribute>
<attribute name="enabled">
diff --git a/include/libvirt/libvirt-domain.h b/include/libvirt/libvirt-domain.h
index 1e0e74c..3da0e9b 100644
--- a/include/libvirt/libvirt-domain.h
+++ b/include/libvirt/libvirt-domain.h
@@ -2189,15 +2189,15 @@ void virDomainStatsRecordListFree(virDomainStatsRecordPtr *stats);
# define VIR_PERF_PARAM_REF_CPU_CYCLES "ref_cpu_cycles"
/**
- * VIR_PERF_PARAM_CACHE_L1D:
+ * VIR_PERF_PARAM_CACHE_L1DRA:
*
- * Macro for typed parameter name that represents cache_l1d
+ * Macro for typed parameter name that represents cache_l1dra
* perf event which can be used to measure the count of total
- * level 1 data cache by applications running on the platform.
- * It corresponds to the "perf.cache_l1d" field in the
- * *Stats APIs.
+ * read accesses for level 1 data cache by applications running
+ * on the platform. It corresponds to the "perf.cache_l1dra"
+ * field in the *Stats APIs.
*/
-# define VIR_PERF_PARAM_CACHE_L1D "cache_l1d"
+# define VIR_PERF_PARAM_CACHE_L1DRA "cache_l1dra"
int virDomainGetPerfEvents(virDomainPtr dom,
virTypedParameterPtr *params,
diff --git a/src/libvirt-domain.c b/src/libvirt-domain.c
index 3023f30..fa39069 100644
--- a/src/libvirt-domain.c
+++ b/src/libvirt-domain.c
@@ -11250,8 +11250,9 @@ virConnectGetDomainCapabilities(virConnectPtr conn,
* CPU frequency scaling by applications running
* as unsigned long long. It is produced by the
* ref_cpu_cycles perf event.
- * "perf.cache_l1d" - The count of total level 1 data cache as unsigned
- * long long. It is produced by cache_l1d perf event.
+ * "perf.cache_l1dra" - The count of total read accesses for level 1 data
+ * cache as unsigned long long. It is produced by
+ * cache_l1dra perf event.
*
* Note that entire stats groups or individual stat fields may be missing from
* the output in case they are not supported by the given hypervisor, are not
diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c
index 42f9889..7e2ea96 100644
--- a/src/qemu/qemu_driver.c
+++ b/src/qemu/qemu_driver.c
@@ -9877,7 +9877,7 @@ qemuDomainSetPerfEvents(virDomainPtr dom,
VIR_PERF_PARAM_STALLED_CYCLES_FRONTEND, VIR_TYPED_PARAM_BOOLEAN,
VIR_PERF_PARAM_STALLED_CYCLES_BACKEND, VIR_TYPED_PARAM_BOOLEAN,
VIR_PERF_PARAM_REF_CPU_CYCLES, VIR_TYPED_PARAM_BOOLEAN,
- VIR_PERF_PARAM_CACHE_L1D, VIR_TYPED_PARAM_BOOLEAN,
+ VIR_PERF_PARAM_CACHE_L1DRA, VIR_TYPED_PARAM_BOOLEAN,
NULL) < 0)
return -1;
diff --git a/src/util/virperf.c b/src/util/virperf.c
index 8554723..11e64df 100644
--- a/src/util/virperf.c
+++ b/src/util/virperf.c
@@ -44,7 +44,7 @@ VIR_ENUM_IMPL(virPerfEvent, VIR_PERF_EVENT_LAST,
"branch_instructions", "branch_misses",
"bus_cycles", "stalled_cycles_frontend",
"stalled_cycles_backend", "ref_cpu_cycles",
- "cache_l1d");
+ "cache_l1dra");
struct virPerfEvent {
int type;
@@ -113,9 +113,11 @@ static struct virPerfEventAttr attrs[] = {
.attrConfig = 0,
# endif
},
- {.type = VIR_PERF_EVENT_CACHE_L1D,
+ {.type = VIR_PERF_EVENT_CACHE_L1DRA,
.attrType = PERF_TYPE_HW_CACHE,
- .attrConfig = PERF_COUNT_HW_CACHE_L1D},
+ .attrConfig = (PERF_COUNT_HW_CACHE_L1D) |
+ (PERF_COUNT_HW_CACHE_OP_READ << 8) |
+ (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)},
};
typedef struct virPerfEventAttr *virPerfEventAttrPtr;
diff --git a/src/util/virperf.h b/src/util/virperf.h
index 4c562af..36ceb3a 100644
--- a/src/util/virperf.h
+++ b/src/util/virperf.h
@@ -47,7 +47,7 @@ typedef enum {
the backend of the instruction
processor pipeline */
VIR_PERF_EVENT_REF_CPU_CYCLES, /* Count of ref cpu cycles */
- VIR_PERF_EVENT_CACHE_L1D, /* Count of level 1 data cache*/
+ VIR_PERF_EVENT_CACHE_L1DRA, /* Count of read accesses for level 1 data cache */
VIR_PERF_EVENT_LAST
} virPerfEventType;
diff --git a/tests/genericxml2xmlindata/generic-perf.xml b/tests/genericxml2xmlindata/generic-perf.xml
index d1418d0..9b01aef 100644
--- a/tests/genericxml2xmlindata/generic-perf.xml
+++ b/tests/genericxml2xmlindata/generic-perf.xml
@@ -26,7 +26,7 @@
<event name='stalled_cycles_frontend' enabled='yes'/>
<event name='stalled_cycles_backend' enabled='yes'/>
<event name='ref_cpu_cycles' enabled='yes'/>
- <event name='cache_l1d' enabled='yes'/>
+ <event name='cache_l1dra' enabled='yes'/>
</perf>
<devices>
</devices>
diff --git a/tools/virsh.pod b/tools/virsh.pod
index cfa7a24..798c02e 100644
--- a/tools/virsh.pod
+++ b/tools/virsh.pod
@@ -946,7 +946,7 @@ I<--perf> returns the statistics of all enabled perf events:
"perf.stalled_cycles_frontend" - the count of stalled frontend cpu cycles,
"perf.stalled_cycles_backend" - the count of stalled backend cpu cycles,
"perf.ref_cpu_cycles" - the count of ref cpu cycles,
-"perf.cache_l1d" - the count of level 1 data cache
+"perf.cache_l1dra" - the count of read accesses for level 1 data cache
See the B<perf> command for more details about each event.
@@ -2311,8 +2311,8 @@ B<Valid perf event names>
ref_cpu_cycles - Provides the count of total cpu cycles
not affected by CPU frequency scaling by
applications running on the platform.
- cache_l1d - Provides the count of total level 1 data cache
- by applications running on the platform.
+ cache_l1dra - Provides the count of total read accesses for level 1
+ data cache by applications running on the platform.
B<Note>: The statistics can be retrieved using the B<domstats> command using
the I<--perf> flag.
--
1.9.3
--
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