On Wed, Jan 11, 2017 at 11:55:28AM +0100, Martin Kletzander wrote:
> On Wed, Jan 11, 2017 at 10:05:26AM +0000, Daniel P. Berrange wrote:
> >
> > IIUC, the kernel lets us associate individual PIDs
> > with each cache. Since each vCPU is a PID, this means
> > we are able to allocate different cache size to
> > different CPUs. So we need to be able to represent
> > that in the XML. I think we should also represent
> > the allocation in a normal size (ie KiB), not in
> > count of min unit.
> >
> > So eg this shows allocating two cache banks and giving
> > one to the first 4 cpus, and one to the second 4 cpus
> >
> > <cachetune>
> > <bank type="l3" size="5632" unit="KiB" cpus="0,1,2,3"/>
> > <bank type="l3" size="5632" unit="KiB" cpus="4,5,6,7"/>
> > </cachetune>
> >
>
> I agree with your approach, we just need to keep in mind two more
> things. I/O threads and the mail QEMU (emulator) thread can have
> allocations as well. Also we need to say on which socket the allocation
> should be done.
Also, I wonder if this is better put in the existing <cputune>
element, since this is really an aspect of the CPU configuration.
Perhaps split configuration of cache banks from the mapping to
cpus/iothreads/emulator. Also, per Marcello's mail, we need to
include the host cache ID, so we know where to allocate from
if there's multiple caches of the same type. So XML could look
more like this:
<cputune>
<cache id="1" host_id="2" type="l3" size="5632" unit="KiB"/>
<cache id="2" host_id="4" type="l3" size="5632" unit="KiB"/>
<cpu_cache vcpus="0-3" id="1"/>
<cpu_cache vcpus="4-7" id="2"/>
<iothread_cache iothreads="0-1" id="1"/>
<emulator_cache id="2"/>
</cputune>
Regards,
Daniel
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