> Also, why only l3 cache. Why not expose full info about > the CPU cache hierarchy. It feels wrong to expose only > L3 cache and ignore other levels of cache. Okay, I’ll think how to expose there into capabilities. This is related to enable cache tune support in [1] The status in kernel is that only L3 cache can be tuned(by cat_l3 support in kernel) for now. Could you help to give some input for the RFC of cache tune? [1]https://www.redhat.com/archives/libvir-list/2017-January/msg00354.html Thanks Eli. -- libvir-list mailing list libvir-list@xxxxxxxxxx https://www.redhat.com/mailman/listinfo/libvir-list
