* Eduardo Habkost (ehabkost@xxxxxxxxxx) wrote:
> A recent glibc commit[1] added a blacklist to ensure it won't use
> TSX on hosts that are known to have a broken TSX implementation.
>
> Our existing Haswell CPU model has a blacklisted
> family/model/stepping combination, so it has to be updated to
> make sure guests will really use TSX. This is done by patch 5/5.
>
> However, to do this safely we need to ensure the host CPU is not
> a blacklisted one, so we won't mislead guests by exposing
> known-to-be-good FMS values on a known-to-be-broken host. This is
> done by patch 3/5.
I'd just like to mke sure I understand the way this will fail in a migration;
lets say we have a guest that doesn't have the new libc and hosts
with a blacklisted CPU, and -cpu Haswell.
If I understand correctly then:
a) With 'enforce' the destination qemu will fail to start
printing an error about the host lack of tsx feature.
b) Without 'enforce' the destination will start but print
the same error as a warning, but the guest will probably
break as soon as it tries to use a tsx feature?
Any other combination?
Dave
> [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=2702856bf45c82cf8e69f2064f5aa15c0ceb6359
>
> ---
> Cc: dgilbert@xxxxxxxxxx
> Cc: fweimer@xxxxxxxxxx
> Cc: carlos@xxxxxxxxxx
> Cc: triegel@xxxxxxxxxx
> Cc: berrange@xxxxxxxxxx
> Cc: jdenemar@xxxxxxxxxx
> Cc: pbonzini@xxxxxxxxxx
>
> Eduardo Habkost (5):
> i386: Add explicit array size to x86_cpu_vendor_words2str()
> i386: host_vendor_fms() helper function
> i386/kvm: Blacklist TSX on known broken hosts
> pc: Add 2.9 machine-types
> i386: Change stepping of Haswell to non-blacklisted value
>
> include/hw/i386/pc.h | 6 ++++++
> target/i386/cpu.h | 1 +
> hw/i386/pc_piix.c | 15 ++++++++++++---
> hw/i386/pc_q35.c | 13 +++++++++++--
> target/i386/cpu.c | 32 ++++++++++++++++++++++----------
> target/i386/kvm.c | 17 +++++++++++++++++
> 6 files changed, 69 insertions(+), 15 deletions(-)
>
> --
> 2.11.0.259.g40922b1
>
--
Dr. David Alan Gilbert / dgilbert@xxxxxxxxxx / Manchester, UK
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