Marcel Apfelbaum <marcel@xxxxxxxxxx> writes: > On 11/24/2016 03:34 PM, Markus Armbruster wrote: >> Eduardo Habkost <ehabkost@xxxxxxxxxx> writes: >> >>> On Wed, Nov 23, 2016 at 06:43:16PM +0200, Marcel Apfelbaum wrote: >>>> On 11/22/2016 03:11 AM, Eduardo Habkost wrote: >>>>> The Problem >>> > > [...] > >> Our decision to have hybrid PCI/PCIe devices and buses breeds >> considerable complexity. I wish we had avoided them, but I believe it's >> too late to change now. >> >>>> This still does not solve the problem that some devices makes >>>> sense only on a specific arch. >> > > Hi Markus, > >> Examples? >> > > One quick example would be that we don't want to see > Intel's IOH 3420 PCIe Root Port in an ARM machine, > or a pxb on a Q35 machine (in this case we want pxb-pcie) Such a device would be weird. But would it be wrong? Wrong enough for QEMU to reject it? Unless QEMU rejects it, there's no reason not to list it as pluggable. > I do believe there are other examples, I'll try to think of more. > > Thanks, > Marcel > > [...] -- libvir-list mailing list libvir-list@xxxxxxxxxx https://www.redhat.com/mailman/listinfo/libvir-list
