Adding x86 CPU models into a list of supported CPUs for non-x86 architectures is not a very good idea. Each architecture we test needs to maintain its own list of supported CPU models. Signed-off-by: Jiri Denemark <jdenemar@xxxxxxxxxx> --- Notes: Version 2: - no change .../qemuxml2argv-pseries-cpu-exact.args | 2 +- .../qemuxml2argv-pseries-cpu-exact.xml | 2 +- tests/qemuxml2argvtest.c | 37 +++++++++++++++------- 3 files changed, 28 insertions(+), 13 deletions(-) diff --git a/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.args b/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.args index 4d27f05..803c1aa 100644 --- a/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.args +++ b/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.args @@ -8,7 +8,7 @@ QEMU_AUDIO_DRV=none \ -name QEMUGuest1 \ -S \ -M pseries \ --cpu POWER7_v2.3 \ +-cpu POWER7 \ -m 512 \ -smp 1,sockets=1,cores=1,threads=1 \ -uuid 1ccfd97d-5eb4-478a-bbe6-88d254c16db7 \ diff --git a/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.xml b/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.xml index b54dae2..830e781 100644 --- a/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.xml +++ b/tests/qemuxml2argvdata/qemuxml2argv-pseries-cpu-exact.xml @@ -7,7 +7,7 @@ <type arch='ppc64' machine='pseries'>hvm</type> </os> <cpu match='exact'> - <model>POWER7_v2.3</model> + <model>POWER7</model> <vendor>IBM</vendor> </cpu> <clock offset='utc'/> diff --git a/tests/qemuxml2argvtest.c b/tests/qemuxml2argvtest.c index 8190556..2812ab6 100644 --- a/tests/qemuxml2argvtest.c +++ b/tests/qemuxml2argvtest.c @@ -283,27 +283,42 @@ struct testInfo { static int testAddCPUModels(virQEMUCapsPtr caps, bool skipLegacy) { - const char *newModels[] = { + virArch arch = virQEMUCapsGetArch(caps); + const char *x86Models[] = { "Opteron_G3", "Opteron_G2", "Opteron_G1", "Nehalem", "Penryn", "Conroe", "Haswell-noTSX", "Haswell", }; - const char *legacyModels[] = { + const char *x86LegacyModels[] = { "n270", "athlon", "pentium3", "pentium2", "pentium", "486", "coreduo", "kvm32", "qemu32", "kvm64", "core2duo", "phenom", "qemu64", }; + const char *armModels[] = { + "cortex-a9", "cortex-a8", "cortex-a57", "cortex-a53", + }; + const char *ppc64Models[] = { + "POWER8", "POWER7", + }; - if (virQEMUCapsAddCPUDefinitions(caps, newModels, - ARRAY_CARDINALITY(newModels)) < 0) - return -1; + if (ARCH_IS_X86(arch)) { + if (virQEMUCapsAddCPUDefinitions(caps, x86Models, + ARRAY_CARDINALITY(x86Models)) < 0) + return -1; - if (skipLegacy) - return 0; - - if (virQEMUCapsAddCPUDefinitions(caps, legacyModels, - ARRAY_CARDINALITY(legacyModels)) < 0) - return -1; + if (!skipLegacy && + virQEMUCapsAddCPUDefinitions(caps, x86LegacyModels, + ARRAY_CARDINALITY(x86LegacyModels)) < 0) + return -1; + } else if (ARCH_IS_ARM(arch)) { + if (virQEMUCapsAddCPUDefinitions(caps, armModels, + ARRAY_CARDINALITY(armModels)) < 0) + return -1; + } else if (ARCH_IS_PPC64(arch)) { + if (virQEMUCapsAddCPUDefinitions(caps, ppc64Models, + ARRAY_CARDINALITY(ppc64Models)) < 0) + return -1; + } return 0; } -- 2.10.0 -- libvir-list mailing list libvir-list@xxxxxxxxxx https://www.redhat.com/mailman/listinfo/libvir-list