On 06/23/2015 11:35 AM, Alex Williamson wrote:
> On Mon, 2015-06-22 at 14:44 -0400, Laine Stump wrote:
>> This is backed by the qemu device xio3130-downstream. It can only be
>> connected to a pcie-switch-upstream-port (x3130-upstream) on the
>> upstream side.
>> ---
>> src/qemu/qemu_command.c | 15 +++++++++++++++
>> .../qemuxml2argv-pcie-switch-downstream-port.args | 13 +++++++++++++
>> tests/qemuxml2argvtest.c | 9 +++++++++
>> 3 files changed, 37 insertions(+)
>> create mode 100644 tests/qemuxml2argvdata/qemuxml2argv-pcie-switch-downstream-port.args
>>
>> diff --git a/src/qemu/qemu_command.c b/src/qemu/qemu_command.c
>> index b4df65a..064adcb 100644
>> --- a/src/qemu/qemu_command.c
>> +++ b/src/qemu/qemu_command.c
>> @@ -2367,6 +2367,10 @@ qemuAssignDevicePCISlots(virDomainDefPtr def,
>> */
>> flags = VIR_PCI_CONNECT_TYPE_PCIE_ONLY;
>> break;
>> + case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT:
>> + /* pcie-switch-port can only plug into pcie-switch */
>> + flags = VIR_PCI_CONNECT_TYPE_PCIE_SWITCH;
>> + break;
>> default:
>> flags = VIR_PCI_CONNECT_HOTPLUGGABLE | VIR_PCI_CONNECT_TYPE_PCI;
>> break;
>> @@ -4647,6 +4651,17 @@ qemuBuildControllerDevStr(virDomainDefPtr domainDef,
>> }
>> virBufferAsprintf(&buf, "x3130-upstream,id=%s", def->info.alias);
>> break;
>> + case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT:
>> + if (!virQEMUCapsGet(qemuCaps, QEMU_CAPS_DEVICE_XIO3130_DOWNSTREAM)) {
>> + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s",
>> + _("The pcie-switch-downstream-port "
>> + "(xio3130-downstream) controller "
>> + "is not supported in this QEMU binary"));
>> + goto error;
>> + }
>> + virBufferAsprintf(&buf, "xio3130-downstream,port=1,chassis=%d,id=%s",
>> + def->idx, def->info.alias);
> And why put all the downstream switch ports on port=1?
Just because that's what was shown as an example in docs/q35-chipset.cfg
in the qemu source.
> I had suggested
> the slot address would match what I see on physical hardware. Is the
> slot address not available at this point?
Yes, the slot is available - def->info.addr.pci.slot. I was just in "new
information overload" and missed that part. I'll do it that way the next
round.
Thanks again for the comments.
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