William Case kirjoitti viestissään (lähetysaika keskiviikko, 30. syyskuuta 2009): > The second diagram shows a set of 4 X 4 arrays -- with a > major disclaimer about its accuracy at the bottom. I have > also seen other sites plus a couple of text books I own that > show the cell arrangement as a linear setup. But only for 32 > bit machines. I found nothing for 64 bit DRAM. The bit width of the CPU has no effect on the DRAM chip layout. You simply connect enough chips in parallel to achieve the desired data bus width. A typical 64-bit DIMM "stick" has eight 8-bit wide chips. -- Markku Kolkka markku.kolkka@xxxxxx -- fedora-list mailing list fedora-list@xxxxxxxxxx To unsubscribe: https://www.redhat.com/mailman/listinfo/fedora-list Guidelines: http://fedoraproject.org/wiki/Communicate/MailingListGuidelines
