On Fri, 2012-08-17 at 07:09 +0530, Shakthi Kannan wrote: > Hi, > > --- On Fri, Aug 17, 2012 at 4:49 AM, Kévin Raymond > <shaiton@xxxxxxxxxxxxxxxxx> wrote: > | They are actually building a FabLab: they have few makerbots (like a > 3D printer) > | and some other goodies. > \-- > > Thanks for the info! > > --- > | Do you see something that we can propose as a workshop (if it works with the > | organization of course)? > \-- > > Hands-on tutorial sessions on gEDA tool suite (for example) will be > quite useful for the audience. > > http://www.gpleda.org/ > > SK > I agree with he tutorial on gEDA tools. I have been trying for the past week to get a simulation working with a bit of a schematic I have drawn. I am an old hand at design, but new to simulation. Generally I work out all the math, bread board the basic design and some empirical testing and I am good to go, but my newer designs are getting more and more complex, so I need a new and hopefully better method. It took me a long time to track down the links between the symbol, the footprint(s) and the model(s) to get my simulation to work. Someone could do us all a favor by connecting all the dots. The basic documentation for the symbol is not sufficient, nor are the linkages between the various bits explained well, at least I certainly had a hard time tracking down the bits. Note that the basic documentation says to create a gafrc file in the users home directory. That works, but breaks other links that are needed. It should go in the .gEDA directory for best results. Note also that there is a ngspicerc and a gnetlistrc file in there, and these need to be updated. The documentation on the PINSEQ label doesn't really tell what it does (it seems to control the order the pins appear in the netlist file, which in turn affects the order of attachment in the model when the model file is linked to the netlist for simulation.) Also the footprint affects both the layout tools, and the netlist used for simulation. There are many bits of the symbol file that have to be "just right" for this all to work, and while gsheme is well documented, and gnetlist is well documented, and PCB designer seems usable, the links between all of them are not simple to find or figure out. Maybe I missed some neat documentation package, or I was just too dense, but it took a long time to get it all working, and I am still figuring out parts of it, more over I am not sure it is right, as my circuit is a bit more unstable than I remember in reality (I am using a circuit I have built in the past to learn.) It drops out in simulation with some does not converge errors, depending on the step and lenght of the simulation. That could use a bit more documentation as well, and a bit of a troubleshooting guide on how to break down a few different types of circuits to show how to isolate the issues. Regards, Les H _______________________________________________ electronic-lab mailing list electronic-lab@xxxxxxxxxxxxxxxxxxxxxxx https://admin.fedoraproject.org/mailman/listinfo/electronic-lab
